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I have listed the projects I have done during the course of my
Undergraduate and Graduate study. Links to the reports have also
been provided for a couple of these.
 | Delta-Sigma A/D Modulator: A fourth order Delta-Sigma
Modulator with a 2 by 2 MASH architecture was designed and simulated
to be a part of a RF transceiver. Mathematical models were first made
and simulated using MATLAB and the circuit simulations were done using
Spectre. 0.12?m IBM CMOS technology files were used.
http://www.geocities.com/venigal_ram/Projects/Report.pdf |
| 32-bit ALU: A 32-bit ALU processor was designed with VHDL.
Simulations were done using View Logic and the synthesis was done
using Ambit’s BuildGates synthesizer. The purpose of the project was
to get familiarized with VHDL simulators to help in the design of
reconfigurable ATM Switches. |
| Time Based Measurement Technique for a 2-Electrode Potentiostat:
A time based measurement technique for the measurement of current in
an electrolytic solution was proposed. It incorporates the use of a
2-electrode potentiostat. Simulations were done using Spectre to
verify the validity of the technique and the circuit was laid out
using Virtuoso layout editor as part of this project. The schematic
and layout were verified using LVS and DRC checks.
http://us.share.geocities.com/venigal_ram/Projects/ASP_Report.pdf |
| 3GPP Standard Turbo Encoder: A Programmable Variable Rate
Turbo Encoder (AMV6323) was designed, simulated and laid out using
0.5?m CMOS Technology. The Turbo Codes are the latest in FEC codes and
have been specified in 3GPP (WCDMA) and 3GPP2 (CDMA 2000) standards.
Simulations were done using Spectre and the circuit was laid out with
Virtuoso layout editor. The schematic and layout were verified using
LVS and DRC checks.
http://www.geocities.com/venigal_ram/Projects/AMV6323.pdf |
| SRAM: An SRAM with 9 words, 2-bit data bus and with a 3-pF
load driving capability was designed and laid out using 0.5?m CMOS
Technology. The feasibility for increasing the bus width to 4-bits and
the memory by up to 2.5X were also demonstrated. Simulations were done
using Spectre and the circuit was laid out with Virtuoso layout
editor. The schematic and layout were verified using LVS and DRC
checks. |
| Low Noise Amplifier: A Low Noise Amplifier (LNA) with the
resonant frequency of 1.8GHz, GT >15dB, IIP3 > -15dB and Noise Figure
< 2dB was designed and laid out with Cadence design tools. MATLAB was
used to get the initial values of components. The initial values were
then used to simulate the circuit in SpectreRF and were further
changed in increments till all the specifications were met.
http://us.share.geocities.com/venigal_ram/Projects/microwave_report.pdf |
| Op-Amp: A Wide Swing Current Mirror Op-Amp was designed
using PSPICE. |
| Second Order Gm-C Band-Pass filter: A Gm-C Band-Pass filter
with electrically adjustable center frequency and Q was designed and
simulated in PSPICE. The purpose of the project was to demonstrate the
operation of a Gm-C filter and to assess the impact of mismatches of
circuit components on the performance of the filter. |
| All-Pass Switched Capacitor filter: An All-Pass Switched
Capacitor filter was designed and simulated in PSPICE. The effect of
Op-Amp characteristics on the Switched Capacitor circuits was studied
as a part of the project. |
| AMI NetZ: Developed a commercial intranet software - AMI
NetZ for American Megatrands Inc., India. The front end user interface
for the software was developed using HTML and Javascript, while the
back end was programmed using JSP and JDBC. Some of the features of
the software included email, workgroups, message boards, address book
etc.
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